该词条未找到_海词词典

您要查找的是不是：

Ultrathin gate dielectric 超薄栅介质
Results show that HfO 2 gate dielectric hold good electrical characteristics. 实验结果显示 :Hf O2 栅介质电容具有良好的 C-V特性 ,较低的漏电流和较高的击穿电压。
Ultra-thin Si 3N 4/SiO 2(N/O) stack gate dielectric with EOT of 2.1nm is fabricated successfully,and its characteristics are investigated. 成功制备了EOT(equivalentoxidethickness)为 2 1nm的Si3 N4/SiO2 (N/O)stack栅介质 ;并对其性质进行了研究 .
Especially, the quality of gate dielectric layer determines the reliability and electrical performance of ultra large scale integrated (ULSI) circuit. 特别是闸极介电层的品质能决定ULSI电路的稳定度与电特性表现。
We focus on how the processes in repaid thermal processor (RTP) affect the electrical characteristics quality of gate dielectric layer. 我们将会集中以快速热制程如何影响介电层电特性。
The reliability of strain silicon,gate dielectric and copper interconnection are discussed,and some new researches are presented. 简介了应变硅材料、栅介质的工艺及铜互连的可靠性,并对新的研究方向做了介绍。
For continued technology scaling, high k materials are required to replace SiO_2 as gate dielectric in the next generation metal oxide field effect transistors (MOSFET). 在过去二十多年里,Si基元器件的大小遵循Moore定律按比例的持续减小。对于下一代金属氧化物半导体场效应管(MOSFET)器件,原来的栅极介电材料SiO_2已经不再适合使用。
By complementing the equivalent oxide thickness (EOT) of a 1.7nm nitride/oxynitride (N/O) stack gate dielectric (EOT=1.7nm) with a W/TiN metal gate electrode,metal gate CMOS devices with sub-100nm gate length are fabricated in China for the first time. 在国内首次将等效氧化层厚度为1·7nm的N/O叠层栅介质技术与W/Ti N金属栅电极技术结合起来;用于栅长为亚100nm的金属栅CMOS器件的制备.
As reducing the gate length toward to submicron CMOS device, selecting a gate dielectric material to improve the electric characteristics and been demonstrated by using ISE-TCAD simulation tool. 从改变氧化层材料与线宽之方式对元件性能的提升并藉由ISE-TCAD 模拟工具来探讨。
Silicon oxide has been used as a gate dielectric of MOSFETs for more than forty years since MOSFET had been introduced due to its excellent stability, uniformity, and easy fabrication process. 自从金氧半导体场效电晶体被发明以来，二氧化矽巳经被用作为其闸极氧化层超过四十年之久，因为二氧化矽拥有极佳的稳定性和均匀度且制作过程较为简单。
DPN process for MOS gate dielectric treatment 绝缘栅氮处理技术
nitride/oxynitride gate dielectric stack 氮氧叠层栅介质
From the band offset viewpoint, those obtained numbers indicate that Er2O3 could be a promising candidate for high-k gate dielectrics. 仅从这一角度来看，Er2O3相对于Si由于其比较大而且对称的价带和导带偏移而可能成为一种很有应用前景的高k栅介质材料。
Chapter 5 is related to 2D device physics, we discuss FIBL(fringing-induced barrier lowering) in subthreshold region with various gate dielectrics, sidewalls, and drain voltages. 第五章探讨二维的元件物理特性，讨论不同闸极介电层、边墙材料、和汲极偏压下，次临界区域的边缘引发位障下降现象。
A man appeared at the castle gate in the guise of a woodcutter. 一个男子打扮成樵夫的模样出现在城堡的门口。
Did you remember to padlock the gate? 你是否记得用挂锁把大门锁上？
I saw him make by the gate on his bicycle. 我看见他骑自行车从大门旁边过去了。
The truck came to a dead stop out of the gate. 那辆卡车在大门外突然停下。
Gate dielectric technology of SiC power devices and circuits SiC功率器件与电路中的栅介质技术
I can open the back gate at midnight. 午夜的时候我可以打开后门。