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- PCI总线接口 PCI bus interface
- PCI总线接口设备 PCI bus interface device
- PCI总线接口设计中的几点体会 Review over the interface design of the PCI-bus card
- 接口 interface (port)
- 高性价比PCI总线接口电路的设计 Design for PCI bus-interface circuit with high ratio of performance and price
- PCI总线接口的CPLD设计 Design of PCI Interface by Using CPLD
- 有讽刺意义的是，具有PCI总线的服务器拥有132兆字节/秒或1千兆位/秒的原始I/O吞吐能力。 Ironically, servers with PCI buses are capable of raw I/O throughput of 132M byte/sec, or 1.05G bit/sec.
- 后端总线逻辑。访问内部统一二级处理器缓存的后端总线接口逻辑。 BBL Back-side Bus Logic. Logic for interface to the back-side bus for accesses to the internal unified level two processor cache.
- 文中具体针对PCI总线的数据采集卡驱动程序通过VC和WinDriver的利用提出了中断的方法。 Aimed at the driver of PCI bus Data sampling card,the thesis concretely advances methods of interruption in virtue of the application of VC and WinDriver.
- 总线接口 bus interface
- PCI总线 PCI bus
- C-PCI总线 C-PCI bus
- 总线接口仿真 bus interface emulation
- CAN总线接口 CAN bus interface
- PCI总线协议 PCI bus - protocol
- ⅡC总线接口 IIC bus interface
- PCI总线从模块 PCI bus target
- SM总线接口 SMBus interface
- PCI总线控制技术 PCI bus control technique
- SPI总线接口 SPI bus interface
