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- The essential blocks of the synthesizer, the prescaler, the phase detector, the chargepump, and the voltagecontrolled oscillator were presented. 提出了合成器的基本模块,包括预分频器,鉴相器,充电泵和压控振荡器。
- In this scheme,the synthesizer contains a low-noise phase detector to achieve the performance of low phase noise and low spur level. 本方案采用了低底噪鉴相器,实现低相噪和低杂散指标。
- To extend the applied range of MAP-NSF algorithm, the problem ofrobust estimation of DOAs of spatial signals under gain/phase error and unstructured error were considered. 为了拓宽最大后验概率-噪声子空间拟合(MAP-NSF)算法在信号到达角估计上的适用范围,针对通道特性失配和非结构误差两种阵列扰动模型,对MAP-NSF算法的信号到达角估计问题进行了讨论。
- Its coder phase detector is proved for lts normal operation during drum imitation test and signal of coder works with no errors. 在模拟钻机滚筒振动试验中,验证了设计的鉴相电路工作正常,编码器测量信号未发生误计数现象。
- The PID control systems were tuned using well?known PID tuning methods, such as Ziegler?Nichols, Chien?Hrones?Reswick, Cohen?Coon, IMC, Opt, Pole? Assignment, and Gain Phase Margin, for several classical thermal models. 针对若干典型热工对象,对一些典型的PID整定方法:Ziegler-Nichols方法、Chien-Hrones-Reswick方法、Cohen-Coon方法、IMC方法、IST2E最优方法、极点配置方法、幅值相位裕量方法所设计的PID控制系统的过渡过程性能进行了比较。
- This thesis presents a circuit architecture to realize clock recovery for fast Ethernet application, including system architecture, modified Mueller Muller algorithm for 100BASE-TX, phase detector for 100BASE-FX and multiple output charge pump PLL. 提出了一种快速以太网卡芯片时钟恢复电路的设计 ,包括体系结构、用于 10 0BASE tx的改进MuellerMuller算法、用于 10 0BASE FX的鉴相器以及产生多相时钟的电荷泵锁相环。
- This paper analyses survey principle of 1532 dielectric log tool,and analyses circuit amplitude detector and phase detector in 1532 dielectric log tool. This paper focuses on dual gate MOSFET and photocoupler for AGC,SCI and FB for noise reduction. 文章介绍 15 32型介电测井仪的测量原理 ,并分析了 15 32型介电测井仪的幅度测量系统和相位测量电路 ,以及用于自动增益控制 (AGC)的双栅极场效应管和光耦合器 ,以及用于抑制噪声的穿心电容器和铁氧体磁珠
- The system s transfer function is analyzed, especially the one of the filter which is connected between VFD and the phase detector, and it should be established on the group delay concept. 根据功能,认为变频器输出电压滤波器的传递函数需要使用群时延概念,为更精确地分析这类问题提供了依据。
- The mathematic module of the PLL was built and the sub-circuit such as Phase Detector(PD),Charge Pump(CP),Loop Filter(LF) and Voltage Control Oscillator(VCO) was designed cautiously. 主要包括:研究了该锁相环系统建模,完成了鉴相器(PD)、电荷泵(CP)、环路滤波器(LF)以及压控振荡器(VCO)子电路设计。
- logarithmic gain phase characteristic 对数增益相位特性
- Design of Power Frequency Digital Phase Detector 工频数字式相位检测仪的设计
- frequency multiplier and phase detector 倍频鉴相
- You can gain by watching how she works. 看她怎样工作就可获益。
- Oil share show modest gain over the week's trading. 石油股票价在上星期的交易中略有上升。
- The masses gain experience through struggle. 群众通过斗争可以取得经验。
- It is not for the love of gain that he does so. 他这样做并非为了得什么好处。
- We provide RF assemble as well, including power splitters, amplifiers, phase detectors, attenuators, synthesizers, multiplexer and radar receiver subassemblies for RF application. 射频组件包括功分器,放大器,鉴相器,衰减器,频综,倍频组件,雷达接收组件等。
- In chapter two, design considerations of DLL are introduced. Some commonly used circuits of the phase detectors, charge pump, and voltage-controlled delay cells are classified. 在第二章中,延迟锁定迴路的设计考量将会被提出。一些常用的相位侦测器、充放电泵及电压控制延迟单元电路也将分类说明。
- We hope for some gain from our investment. 我们希望投资有利可图。
- No practice, no gain in one's wit. 纸上得来终觉浅,要知此事须躬行。