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- The manufacture of solder bump is one of the key technologies for area array packaging (AAP) such as ball grid array (BGA), chip scale packaging (CSP) and flip chip (FC). 钎料凸台的制造是球栅阵列封装(BGA, ball grid array)、芯片尺寸级封装(CSP, chip scale packaging)及倒装芯片封装(FC, flip chip)等面阵封装的关键技术之一。
- Stress analysis on gold wire of chip scale package 芯片尺度封装中焊线的应力分析研究
- chip scale package (CSP) 芯片尺寸封装
- CSP(Chip scale package) 芯片级封装（CSP）
- Dual In-line Memory Module with Wafer Level Chip Scale Package 在内的芯片组大厂注意而成为内存模块新标准。晶圆级封装的内存模块
- W.W. Lee, L.T. Nguyen, and G.S. Selvaduray, “Solder Joint Fatigue Models: Review and Applicability to Chip Scale Packages,” Microelectronics Reliability, Vol. 40, pp. 231-244, 2000. 刘宏毅，金属受随机负载作用下之疲劳分析模式与探讨，国立台湾大学机械工程研究所硕士论文，1998。
- wafer-level chip scale packaging 圆片级芯片尺寸封装
- TVS diode Chip Scale Package 瞬态电压抑制二极管覆晶晶片微型封装
- Chip scale package 芯片规模封装
- Stacked chip scale package 叠层芯片尺寸封装
- Chip scale packaging 芯片规模封装技术
- Desirable for Chip Size Package (CSP). 芯片尺寸封装技术需要倒装焊。
- The WLP technology that initiates processing from Wafer-Level and finishes in chip scale will be applicable on a daily broadening scale in plane array FCP. 在圆片规模上开始加工,结束于芯片规模的圆片级封装技术将在面型阵列倒装芯片的封装中得到日益广泛的应用。
- He is a great guy, a chip off the old block. 他是一位好人，就像他父亲一样。
- The shares of their company are blue chip. 他们公司的值钱而又红利稳。
- Finite element based solder joint fatigue life predictions for a same die stacked chip scale ball grid array package 芯片叠层球栅阵列尺寸封装的焊球疲劳寿命预测
- Be careful with these plates they chip very easily. 小心这些盘子--边缘容易破损。
- The next year the work went ahead on a large scale. 第二年这项工作就大规模进行了。
- Do you want boil potato or chip with your steak? 您想佐煮土豆还是油炸土豆条。
- The project as being undertaken on a small scale. 这个工程在小规模地进行着。
