Unlike previous works, we can optimize the total power consumption, the level shifter overhead, and the power network complexity without compromising the wirelength and the chip area.

• 与以往的研究相比，我们可以最佳化整体功率消耗、电位移转器负担、电压网路复杂度，并且不会牺牲掉线路长度跟面积。