This paper discusses the advantages of PLD (programmable logical device) in designing a digital circuit,and at the same time,discusses how to realize a 6 bit synchronous up/down counter with clear by using PLD GAL16V8.

• 介绍了PLD器件在设计数字电路时的优越性，同时叙述了以PLD器件GAL16V8实现六位可清零、可置数的同步可逆计数器的原理。