This article discusses digital cymometer design principles and procedu res by using VHDL hardware descriptive programming,EDA tools and on the basis o f grand scale programmable logic device FPGA/CPLD.

• 详细论述了利用VHDL硬件描述语言设计 ,并在EDA(电子设计自动化 )工具的帮助下 ,用大规模可编程逻辑器件 (FPGA/CPLD)实现数字频率计的设计原理及相关程序。