The design method of a high speed real-time FFT processor using FPGA and ASIC technology is presented. It is based on the R4 DIT algorithm, Ping-pong RAM design and pipeline structure between stages.

• 本文讨论了采用FPGA和ASIC硬件实现高速实时FFT处理器的设计方案,作者在这种高速FFT设计时选择的特点基于Radix 4 DIT算法、采用乒乓RAM的设计思路以及级与级间采用流水结构。