The behavior of a Viterbi decoder was described in VHDL, and then the VHDL description was modified to embed the low-power design.

• 开关过滤电路应用于回溯部分。维特比解码器行为是用硬件描述语言编写的，通过对其修改加入低功耗设计，再通过逻辑综合得到门级电路。