Serial EEPROM 24c16 which is based on I2C interface is used in our system. We design synthesiable read/write module of serial EEPROM with Verilog HDL, and implement it in CPLD. This module can be used as IP core in other related design.

• 在系统中使用了基于I2C接口的串行EEPROM,我们采用Verilog HDL语言设计了串行EEPROM读写的可综合模块,在CPLD内实现了I2C总线的虚拟接口,该模块也可以作为IP核在相关的设计中使用。