SA-DFF compares the logic level of D-port and Q-port, automatically deactivates the internal clock when they are equal, or reactivates the internal clock when they are not equal.
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释义
自适应触发器监视D端和Q端的逻辑电平,当两者的逻辑电平相等时,就会自动把触发器的内部时钟停在逻辑高电平;
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