In this range the designer must compensate for the issues listed in the above drawing and remove fixed errors such as impedance mismatch and data/clock skew issues.

• 在这个区间里设计者一定要对上面图1中列出来的问题进行补偿，对确定的误差要消除比如阻抗不匹配以及数据/时钟的相位差问题。