In this paper, a set of detailed algorithms is presented to disFese conditional branch statements. These algorithms have been implemented in the experimental VHDL RTL inference system VHB.

• 详细讨论了VHDL中条件分支语句的处理算法；实验结果表明，使用这套算法实现多路器综合，可以得到资源利用率较高的电路.