CMOS device dimensions scale down to the very deep submicrometer.ICs are going towards higher density, higher speed and lower power dissipation making new challenges on IC test and design for test.

• 摘要CMOS器件进入超深亚微米阶段，集成电路(IC)继续向高集成度、高速度、低功耗发展，使得IC在测试和可测试性设计上都面临新的挑战。