A low-voltage power VDMOS is designed using virtual fabrication.A virtual device is simulated and the structure of device is settled through the optimizing of process parameters.

• 摘要采用虚拟制造方法设计了低压功率VDMOS器件，并对其进行结构参数、物理参数和电性能参数的模拟测试，确定了器件的物理结构。